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- W2510385433 abstract "In the push for thinner packages for applicationprocessors, baseband processors, and other devices, EmbeddedTrace Substrates (ETS) have found quick adoption in themicroelectronics packaging industry. ETS offer several benefitsover conventional cored substrates, such as dielectric layerthickness reduction, layer count reduction, and lowermanufacturing costs. In parallel, copper pillar interconnectshave become a standard for devices that fall into the FlipChip/Chip Scale Package (fcCSP) envelope. Copper pillartechnology provides long-term reliability, high bumping yields, and very fine pitch interconnects, all of which have becomemandatory attributes for advanced devices. As a result, copperpillar technology with ETS is now a popular choice for low-cost, robust solutions to many of the most demanding deviceapplications. While ETS have many benefits, they suffer riskswhich cored Protruded Trace Substrates do not, namely, areduced trace surface area for first-level interconnection and aninherent pad recess below the substrate surface. Both of thesecharacteristics increase the risk of non-wets occurring duringchip attach in device assembly. In order to take full advantage of the benefits of copperpillar technology and ETS, reliability risks must be reduced toa minimum. The present paper seeks to do so by identifying thekey geometric variables involved in the chip attach process ofcopper pillar bumps on ETS and developing a mathematicalmodel to understand how each variable plays a role in thewetting outcome of the chip attach process. The intended goal ofthis paper is to provide a useful tool to predict and ultimatelyreduce the risk of non-wets." @default.
- W2510385433 created "2016-09-16" @default.
- W2510385433 creator A5025862260 @default.
- W2510385433 date "2016-05-01" @default.
- W2510385433 modified "2023-09-26" @default.
- W2510385433 title "Improving Copper Pillar Interconnection on Embedded Trace Substrates" @default.
- W2510385433 cites W2053977870 @default.
- W2510385433 cites W2244978547 @default.
- W2510385433 doi "https://doi.org/10.1109/ectc.2016.286" @default.
- W2510385433 hasPublicationYear "2016" @default.
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