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- W2511505113 abstract "This paper presents the design of a second-order continuous time (CT) Σ Δ modulator with DC gain compensated OTA based integrators. Compared to similar solutions, this novel technique uses a simple transconductor stage to compensate for the multi-bit feedback DAC inputs in the modulator. The work details the effective compensation technique by using a negative transconductance stage that only increases a 17% of the overall Σ Δ power consumption. The compensated CT modulator is implemented in a 65nm CMOS process and achieves a SQNR of 79.3 dB and a state-of-the-art FoM of 31fJ/conv-level." @default.
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- W2511505113 date "2016-10-01" @default.
- W2511505113 modified "2023-09-23" @default.
- W2511505113 title "Continuos Time ΣΔ modulator with efficient gain compensated integrators" @default.
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- W2511505113 doi "https://doi.org/10.1016/j.mejo.2016.08.003" @default.
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