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• W2514508748 abstract "In this paper, a successful assembly of the two guest dies on the large size (38.7 mm × 26.7 mm) through silicon interposer (TSI) and 45mm × 45mm size organic substrate was achieved. The warpage at different steps of the proposed assembly flow: Chip-on-Chip (CoC) first, then CoC on Substrate (CoC-oS) was measured by the shadow moire method. The warpage simulation model was also developed and validated by the shadow moire warpage measurement results in order to optimize warpage level of the 2.5D TSI assembly process." @default.
• W2514508748 created "2016-09-16" @default.
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• W2514508748 date "2016-05-01" @default.
• W2514508748 modified "2023-09-27" @default.
• W2514508748 title "Assembly Process and Warpage Management of Large Size through Silicon Interposer (38.7mm × 26.7mm) Package" @default.
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• W2514508748 doi "https://doi.org/10.1109/ectc.2016.151" @default.
• W2514508748 hasPublicationYear "2016" @default.
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