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• W2522953484 abstract "This paper presents a miniaturized wide-input-range integrated reconfigurable three-level dc-dc voltage regulator. A three-level buck converter topology with zerovoltage switching (ZVS) is adopted to remove the dominant switching power loss under high-input-voltage condition, thereby enabling the converter to achieve high power efficiency in the megahertz range and reduce the required values of power passives. A constant-frequency adaptive-on-time V <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> control is proposed to not only regulate the output voltage, but also offer the flying capacitor self-balancing in the megahertz range and over a wide input range for improving the converter reliability. A body diode-based floating ZVS detector is also developed to enable full-ZVS operation of power transistors in high-frequency low duty-ratio conditions with ≤5 ns ZVS turnon delay. Implemented in a 120 V 0.5 μm CMOS process, the proposed voltage regulator uses four 50 V on-chip power nMOS to support an input voltage from 12 to 100 V and regulates the output voltage at 10 V with a maximum output power of 5 W. The proposed regulator achieves a maximum power efficiency of 90% under the nominal 48 V input and 2 MHz switching frequency. Compared with the state-of-the-art counterparts, the proposed regulator provides 66 times and 2.6 times reductions in the inductance and the total capacitance, respectively." @default.
• W2522953484 created "2016-09-30" @default.
• W2522953484 creator A5024309592 @default.
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• W2522953484 date "2016-12-01" @default.
• W2522953484 modified "2023-10-03" @default.
• W2522953484 title "A 2 MHz 12–100 V 90% Efficiency Self-Balancing ZVS Reconfigurable Three-Level DC-DC Regulator With Constant-Frequency Adaptive-On-Time $V^{2}$ Control and Nanosecond-Scale ZVS Turn-On Delay" @default.
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• W2522953484 doi "https://doi.org/10.1109/jssc.2016.2606581" @default.
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