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- W2528082766 abstract "The new type of High Purity Germanium (HPGe) Detectors' preamplifier electronics typically have two type of output signals, the “fast” output and the “slow” output signals. A high timing resolution at the fast output is enough to clearly resolve the charge collection profiles in the detector for single-site and multi-site events. A combo FADC readout system were designed with mixed 8-Channel 14-Bit 100MHz FADC and 2-Channel 12-Bit 2GHz FADC and high speed 1600MHz 64-Bits DDR3 SDRAM buffer. The challenges include the PCB layout for 2GHz FADC and 1600MHz 64-Bit DDR3 SDRAM, the input data band width is about 59.2Gbps and the buffer band width is about 102.4Gbps. The FADC data can be saved in the DDR3 SDRAM buffer real time for analyze without any drop for some long time length events." @default.
- W2528082766 created "2016-10-14" @default.
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- W2528082766 date "2015-10-01" @default.
- W2528082766 modified "2023-09-24" @default.
- W2528082766 title "Combo FADC readout system with 8-channel 14-Bit 100MHz FADC and 2-channel 12-Bit 2GHz FADC for HPGe detector" @default.
- W2528082766 cites W1963646335 @default.
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- W2528082766 doi "https://doi.org/10.1109/nssmic.2015.7581242" @default.
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