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- W2529866933 abstract "System-on-a-chip (SoC),also referred to as system-level integration (SLI), has become very popular over the past decade. The popularity of this technology is driven mostly by the need for manufacturers to utilize the millions of unused gates on the wafer. SoC development came about because of the gap between the multi-million gates capacity of modern-day process technology and the slow pace of designers to find ways to utilize the millions of gates on the wafer. As knowledge and system implementations improve, more semiconductor manufacturers and vendors are looking to SoC to better utilize the vast silicon area available on the wafer. SoC seems to be the next revolution in very-large-scale integration (VLSI) circuit design. This revolution creates a new set of design and functional challenges for designers. Finding a reliable built-in-self-test (BIST) method is one of the issues that system designers seek to address. Review of the literature highlights a lack in mainstream research; it seems that no research has been conducted on the development of a BIST method that makes comparisons between the output voltages of fault-free devices and output voltages of faulty devices. This study addressed this lack in mainstream research. The primary goal was to highlight the importance of having a good test method for testing SoC devices and to present a reliable and accurate BIST method for testing SoC. The aim was to explore the feasibility of designing a simple yet robust test that could be used to determine whether a circuit on a chip (SoC) is fault-free or faulty and whether the type of fault could be determined based of a comparison of the output voltage of the fault-free circuit with that of the faulty circuit. The assumption was that a faulty device has an output voltage that is quite different in values from that of a fault-free device. The intention was to exploit this feature of voltage difference to develop a programmable BIST method to determine whether that is the case and identify the type of fault affecting the circuits." @default.
- W2529866933 created "2016-10-21" @default.
- W2529866933 creator A5051316826 @default.
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- W2529866933 date "2006-01-01" @default.
- W2529866933 modified "2023-09-26" @default.
- W2529866933 title "Programmable structured test for system-on-a-chip (soc) using pseudo-voltage comparators" @default.
- W2529866933 hasPublicationYear "2006" @default.
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