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- W2536454032 abstract "In this paper, an improved post linearization technique is presented for high frequency low noise amplifiers (LNAs). It employs two auxiliary diode-connected NMOS-PMOS transistors with a resistor and a capacitor which increases the linearity while partially compensates the gain reduction. This technique improves the IIP3 more than 7 dB by reducing the third-order nonlinearity coefficient of output current. The proposed method has been implemented on a two-stage LNA consisting of a common-source stage and a cascode stage. This LNA has been simulated in a 0.18μm RF CMOS technology consuming only 13.9 mW from a single 1.8-V power supply." @default.
- W2536454032 created "2016-10-28" @default.
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- W2536454032 date "2012-12-01" @default.
- W2536454032 modified "2023-09-26" @default.
- W2536454032 title "Low noise amplifier linearization for near millimeter wave band applications" @default.
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- W2536454032 doi "https://doi.org/10.1109/mmwatt.2012.6532165" @default.
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