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- W2537098984 abstract "Design parameters, including transistor width and number of stacked stages, contribute to the efficiency of RF scavenging systems. This leads to a large design space and, as a result, designing optimal RF scavenging circuits for a given performance requirement is a difficult problem. This work presents an analytical model based on the physical design parameters of the power matched Villard voltage doubler. This model is successfully used to determine the optimal design of an RF energy scavenging circuit fabricated in a 130 nm IBM process." @default.
- W2537098984 created "2016-10-28" @default.
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- W2537098984 date "2008-11-01" @default.
- W2537098984 modified "2023-10-05" @default.
- W2537098984 title "Application of a parasitic aware model to optimize an RF energy scavenging circuit fabricated in 130 nm CMOS" @default.
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- W2537098984 doi "https://doi.org/10.1109/amta.2008.4762986" @default.
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