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• W2538283104 abstract "This paper proposed a novel dual voltage scaling layout architecture and a design methodology of low power JPEG2000 codec exploiting dual voltage scaling. Fabricated in SMIC 0.18/spl mu/m 1P6M standard CMOS technology, this codec is capable of JPEG2000 compression/decompression with a 1280/spl times/1024 pixel (YUV422 full color) at 20 frames/s employing 100MHz operation frequency. And the power consumption is 465mW @ 1.8V and 100MH. Applied with dual voltage scaling technique, the power dissipation is reduced by 28.5%." @default.
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• W2538283104 date "2006-04-07" @default.
• W2538283104 modified "2023-09-24" @default.
• W2538283104 title "Design Methodology of Low Power JPEG2000 Codec Exploiting Dual Voltage Scaling" @default.
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• W2538283104 doi "https://doi.org/10.1109/icasic.2005.1611280" @default.
• W2538283104 hasPublicationYear "2006" @default.
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