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- W2541998307 abstract "The recent development of semiconductor technology has achieved downsized, large-scaled and low-power VLSI systems. However, it makes the soft error issue more serious. The soft error is a transient-induced event on memory and logic circuits caused by striking of a-rays emitted from the package and high energy neutron radiation from cosmic rays. This paper presents a soft error hardened latch with high critical charge with short delay time. At 45 nm technology, the critical charge of the proposed latch is at least 142 times larger than the Cosmic-Ray Immune Latch. The CK-Q delay time of the proposed latch is 39% and 63% shorter than existing latches; the delay time is only 1% longer than the Cosmic-Ray Immune Latch. The average dynamic power consumption of the proposed latch is 76% and 28% higher than existing latches." @default.
- W2541998307 created "2016-11-04" @default.
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- W2541998307 date "2016-09-01" @default.
- W2541998307 modified "2023-09-25" @default.
- W2541998307 title "Construction of a soft error (SEU) hardened Latch with high critical charge" @default.
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- W2541998307 doi "https://doi.org/10.1109/dft.2016.7684064" @default.
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