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• W2544540695 abstract "The developed single-electron shut-off (SESO) transistor has a leakage current in the range of 10/sup -19/ A (less than one electron per 100 ms; typical DRAM refresh cycle) or better, and it ushers in an era of opportunities for 4-Gb-or-larger post-DRAM memories. In its ultra-thin (2 nm) polycrystalline silicon film, electron hopping between traps is dramatically suppressed because of its limited number of neighboring traps and the Coulomb blockade effect. A SESO memory gain cell using the SESO transistor, has an over 3,000 second retention time even without a memory capacitor." @default.
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• W2544540695 date "2002-11-11" @default.
• W2544540695 modified "2023-09-25" @default.
• W2544540695 title "A single-electron shut-off transistor for a scalable sub-0.1 μm memory" @default.
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• W2544540695 doi "https://doi.org/10.1109/iedm.2000.904316" @default.
• W2544540695 hasPublicationYear "2002" @default.
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