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- W2545655836 abstract "Electrostatic discharge (ESD) protection design for mixed-voltage I/O interfaces has been one of the key challenges of system-on-a-chip (SOC) implementation in nanoscale CMOS processes. This paper presents an overview on the design concept and circuit implementations of the ESD protection designs for mixed-voltage I/O interfaces without using the additional thick gate-oxide process. The ESD design constraints in mixed-voltage I/O interfaces, the classification, and analysis of ESD protection designs for mixed-voltage I/O interfaces are presented and discussed." @default.
- W2545655836 created "2016-11-04" @default.
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- W2545655836 date "2006-06-08" @default.
- W2545655836 modified "2023-09-27" @default.
- W2545655836 title "ESD Protection Design for Mixed-Voltage I/O Interfaces -- Overview" @default.
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- W2545655836 doi "https://doi.org/10.1109/edssc.2005.1635316" @default.
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