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- W2547515108 abstract "A novel technique to remove the slow-switching-limit (SSL) loss in switched-capacitor (SC) dc-dc converters is presented. A small series inductor is cascaded with an SC converter causing adiabatic charging of the converter's energy-transfer capacitors. In this work, the theory and necessary conditions for SSL loss elimination through an inductive output filter are derived. The new topology enables high efficiency for on-die dc-dc converters while maintaining reasonable energy density. A 2:1 SC converter is built in 65-nm CMOS process to validate the analysis methods and asses the proposed technique. The proposed adiabatic charging enhances the SC efficiency by 3.3 % with only 13 % area overhead, which otherwise requires doubling the capacitor area." @default.
- W2547515108 created "2016-11-11" @default.
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- W2547515108 date "2011-11-01" @default.
- W2547515108 modified "2023-09-25" @default.
- W2547515108 title "Slow-switching-limit loss removal in SC DC-DC converters using adiabatic charging" @default.
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- W2547515108 doi "https://doi.org/10.1109/iceac.2011.6136700" @default.
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