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• W2550193506 abstract "Heterogeneous architectures offer the promise of higher performance/Watt compared to symmetric multi-cores. Recent works have proposed the use of non-monotonic (NM) heterogeneous architectures with diverse core types where each core has unique power and performance characteristics. However, the power and performance benefits achieved by NM architectures is highly dependent on assignment of application to the most suitable core type for all program phases. In this paper we propose a novel online program phase detection technique that is based on the frequency of cache misses and processor stalls which correspond to core resource bottlenecks. We track performance monitors to formulate a Bottleneck Type Vector (BTV) that help direct the application to most appropriate core type for execution. We compare the proposed BTV-based core assignment method to prior online core assignment approaches and demonstrate as much as 22% improvement in average performance/Watt using Instructions per Second (IPS) as the performance metric." @default.
• W2550193506 created "2016-11-30" @default.
• W2550193506 creator A5054064879 @default.
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• W2550193506 date "2016-10-01" @default.
• W2550193506 modified "2023-09-25" @default.
• W2550193506 title "Improving performance per Watt of non-monotonic Multicore Processors via bottleneck-based online program phase classification" @default.
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• W2550193506 doi "https://doi.org/10.1109/iccd.2016.7753337" @default.
• W2550193506 hasPublicationYear "2016" @default.
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