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• W2557793041 abstract "This article first explores the effects of faults on circuits implemented with controllable-polarity transistors. We propose a new fault model that suits the characteristics of these devices, and we report the results of a SPICE-based analysis of the effects of faults on the behavior of some basic gates implemented with them. Hence, we show that the considered devices are able to intrinsically tolerate a rather high number of faults. We finally exploit this property to build a robust and scalable adder whose area, performance, and leakage power characteristics are improved by 15%, 18%, and 12%;, respectively, when compared to an equivalent FinFET solution at 22nm technology node." @default.
• W2557793041 created "2016-12-08" @default.
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• W2557793041 date "2016-12-01" @default.
• W2557793041 modified "2023-10-18" @default.
• W2557793041 title "A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors" @default.
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• W2557793041 doi "https://doi.org/10.1145/2988234" @default.
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