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• W2564241710 abstract "This paper presents the design of a V-band hybrid integrated high-gain antenna. This antenna is designed to meet the system-on-chip applications in a quad flat no-lead (QFN) package. The antenna consists of an on-chip loop radiator, a dielectric resonator (DR), and an off-chip ground plane. The on-chip radiator is fabricated to excite the DR using the standard 0.18-μm CMOS technology with a high-resistivity (HR) silicon substrate. The off-chip ground is realized by a simplified QFN die pad. Several advantages of this off-chip ground structure are discussed in this paper. The impact of the off-chip ground on the performance of the proposed DR antenna is investigated by both simulations and measurements. The DR, the off-chip ground structure, and the HR silicon substrate are simultaneously introduced in this design to augment the gain of the antenna. A measured gain of 7.8 dBi is achieved at 67 GHz with a simulated radiation efficiency of 96.7% and chip size of only 0.7 × 1.25 mm <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> ." @default.
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• W2564241710 date "2017-01-01" @default.
• W2564241710 modified "2023-10-14" @default.
• W2564241710 title "A Hybrid Integrated High-Gain Antenna With an On-Chip Radiator Backed by Off-Chip Ground for System-on-Chip Applications" @default.
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• W2564241710 doi "https://doi.org/10.1109/tcpmt.2016.2628388" @default.
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