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• W2564584120 abstract "In this article, an improved turbo product decoding scheme is proposed. The new method is almost as effective as hard decodable low-density parity check codes (HD-LDPC). Due to the modified codeword shape, no external interleavers are required to correct burst errors. If the decoder uses Reed-Solomon (RS) codes, then error correction performance against burst errors is significantly higher than the gain provided by HD-LDPC with an external interleaver. An additional advantage is a possibility to design a dedicated decoder for Virtex7 field programmable gate array (FPGA) serial transceivers. In our case, we use the method for 100 Gbps data link layer processor dedicated for wireless communication in the Terahertz band. The targeted platform is Virtex7 FPGA, but the solution can be easily scaled on other technologies." @default.
• W2564584120 created "2017-01-06" @default.
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• W2564584120 date "2016-09-01" @default.
• W2564584120 modified "2023-10-03" @default.
• W2564584120 title "Improved turbo product coding dedicated for 100 Gbps wireless terahertz communication" @default.
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• W2564584120 doi "https://doi.org/10.1109/pimrc.2016.7794685" @default.
• W2564584120 hasPublicationYear "2016" @default.
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