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• W2589110725 abstract "This paper proposes a compensation method for inverter nonlinearity for an accurate voltage synthesis. The inverter nonlinearity is caused by dead-times, voltage drops and switching delays and parasitic output capacitance of semiconductor switches, and propagation delays in the gate drive circuits. This paper regards dead-times, voltage drops and switching delays of semiconductor switches as dominant voltage distortion factors. Analyzing those factors of each leg, the proposed method compensates nonlinearity of each leg of inverters. As a result, accurate voltages can be synthesized. Experimental results verify the effectiveness of the proposed method." @default.
• W2589110725 created "2017-02-24" @default.
• W2589110725 creator A5001967366 @default.
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• W2589110725 date "2016-09-01" @default.
• W2589110725 modified "2023-09-23" @default.
• W2589110725 title "Compensation for inverter nonlinearity considering voltage drops and switching delays of each leg's switches" @default.
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• W2589110725 doi "https://doi.org/10.1109/ecce.2016.7854946" @default.
• W2589110725 hasPublicationYear "2016" @default.
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