FRINK Linked Data Fragments server

Matches in SemOpenAlex for { <https://semopenalex.org/work/W2609256860> ?p ?o ?g. }

• W2609256860 abstract "Abstract The design of high-performance application-specific multi-core processor systems still is a time consuming task which involves many manual steps and decisions that need to be performed by experienced design engineers. The ASAM project sought to change this by proposing an automatic architecture synthesis and mapping flow aimed at the design of such application specific instruction-set processor (ASIP) systems. The ASAM flow separated the design problem into two cooperating exploration levels, known as the macro-level and micro-level exploration. This paper presents an overview of the micro-level exploration level, which is concerned with the analysis and design of individual processors within the overall multi-core design starting at the initial exploration stages but continuing up to the selection of the final design of the individual processors within the system. The designed processors use a combination of very-long instruction-word (VLIW), single-instruction multiple-data (SIMD), and complex custom DSP-like operations in order to provide an area- and energy-efficient and high-performance execution of the program parts assigned to the processor node. In this paper we present an overview of how the micro-level design space exploration interacts with the macro-level, how early performance estimates are used within the ASAM flow to determine the tasks executed by each processor node, and how an initial processor design is then proposed and refined into a highly specialized VLIW ASIP. The micro-level architecture exploration is then demonstrated with a walk-through description of the process on an example program kernel to further clarify the exploration and architecture specialization process. The main findings of the experimental research are that the presented method enables an automatic instruction-set architecture synthesis for VLIW ASIPs within a reasonable exploration time. Using the presented approach, we were able to automatically determine an initial architecture prototype that was able to meet the temporal performance requirements of the target application. Subsequently, refinement of this architecture considerably reduced both the design area (by 4x) and the active energy consumption (by 2x)." @default.
• W2609256860 created "2017-05-05" @default.
• W2609256860 creator A5022304494 @default.
• W2609256860 creator A5046780999 @default.
• W2609256860 creator A5072361277 @default.
• W2609256860 creator A5081768631 @default.
• W2609256860 date "2017-06-01" @default.
• W2609256860 modified "2023-09-27" @default.
• W2609256860 title "Automatic instruction-set architecture synthesis for VLIW processor cores in the ASAM project" @default.
• W2609256860 cites W141583583 @default.
• W2609256860 cites W1541611113 @default.
• W2609256860 cites W1550280164 @default.
• W2609256860 cites W1572134249 @default.
• W2609256860 cites W1604677972 @default.
• W2609256860 cites W1782174992 @default.
• W2609256860 cites W1978100243 @default.
• W2609256860 cites W1981305988 @default.
• W2609256860 cites W1984222112 @default.
• W2609256860 cites W1989435461 @default.
• W2609256860 cites W1994557206 @default.
• W2609256860 cites W2010571277 @default.
• W2609256860 cites W2011329948 @default.
• W2609256860 cites W2034490251 @default.
• W2609256860 cites W2034761517 @default.
• W2609256860 cites W2043785486 @default.
• W2609256860 cites W2045177269 @default.
• W2609256860 cites W2063541818 @default.
• W2609256860 cites W2074186102 @default.
• W2609256860 cites W2076485607 @default.
• W2609256860 cites W2087468518 @default.
• W2609256860 cites W2102568252 @default.
• W2609256860 cites W2102976251 @default.
• W2609256860 cites W2106622892 @default.
• W2609256860 cites W2111854880 @default.
• W2609256860 cites W2112537029 @default.
• W2609256860 cites W2116296227 @default.
• W2609256860 cites W2119220373 @default.
• W2609256860 cites W2124421994 @default.
• W2609256860 cites W2140837302 @default.
• W2609256860 cites W2146340167 @default.
• W2609256860 cites W2156088664 @default.
• W2609256860 cites W2157758640 @default.
• W2609256860 cites W2159184138 @default.
• W2609256860 cites W2159797250 @default.
• W2609256860 cites W2163009972 @default.
• W2609256860 cites W2164052549 @default.
• W2609256860 cites W2165575198 @default.
• W2609256860 cites W2296445158 @default.
• W2609256860 cites W2535175217 @default.
• W2609256860 cites W2542883852 @default.
• W2609256860 cites W2574156844 @default.
• W2609256860 cites W2605317797 @default.
• W2609256860 cites W2605741707 @default.
• W2609256860 cites W3143608323 @default.
• W2609256860 cites W3151489216 @default.
• W2609256860 cites W3209706801 @default.
• W2609256860 doi "https://doi.org/10.1016/j.micpro.2017.04.011" @default.
• W2609256860 hasPublicationYear "2017" @default.
• W2609256860 type Work @default.
• W2609256860 sameAs 2609256860 @default.
• W2609256860 citedByCount "1" @default.
• W2609256860 countsByYear W26092568602023 @default.
• W2609256860 crossrefType "journal-article" @default.
• W2609256860 hasAuthorship W2609256860A5022304494 @default.
• W2609256860 hasAuthorship W2609256860A5046780999 @default.
• W2609256860 hasAuthorship W2609256860A5072361277 @default.
• W2609256860 hasAuthorship W2609256860A5081768631 @default.
• W2609256860 hasConcept C107598950 @default.
• W2609256860 hasConcept C118524514 @default.
• W2609256860 hasConcept C127413603 @default.
• W2609256860 hasConcept C149635348 @default.
• W2609256860 hasConcept C150552126 @default.
• W2609256860 hasConcept C170595534 @default.
• W2609256860 hasConcept C173608175 @default.
• W2609256860 hasConcept C177264268 @default.
• W2609256860 hasConcept C199360897 @default.
• W2609256860 hasConcept C201736964 @default.
• W2609256860 hasConcept C202491316 @default.
• W2609256860 hasConcept C2776221188 @default.
• W2609256860 hasConcept C37135326 @default.
• W2609256860 hasConcept C41008148 @default.
• W2609256860 hasConcept C42935608 @default.
• W2609256860 hasConcept C526435321 @default.
• W2609256860 hasConcept C58013763 @default.
• W2609256860 hasConcept C62611344 @default.
• W2609256860 hasConcept C66938386 @default.
• W2609256860 hasConceptScore W2609256860C107598950 @default.
• W2609256860 hasConceptScore W2609256860C118524514 @default.
• W2609256860 hasConceptScore W2609256860C127413603 @default.
• W2609256860 hasConceptScore W2609256860C149635348 @default.
• W2609256860 hasConceptScore W2609256860C150552126 @default.
• W2609256860 hasConceptScore W2609256860C170595534 @default.
• W2609256860 hasConceptScore W2609256860C173608175 @default.
• W2609256860 hasConceptScore W2609256860C177264268 @default.
• W2609256860 hasConceptScore W2609256860C199360897 @default.
• W2609256860 hasConceptScore W2609256860C201736964 @default.
• W2609256860 hasConceptScore W2609256860C202491316 @default.
• W2609256860 hasConceptScore W2609256860C2776221188 @default.
• W2609256860 hasConceptScore W2609256860C37135326 @default.
• W2609256860 hasConceptScore W2609256860C41008148 @default.

• next