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- W2610236413 abstract "Abstract In this paper, MCC carry chain with 8-bit carry chain proposed by Costas Efstathiou and the adder circuits were designed using 32nm CMOS technology with a supply voltage of 0.9v and the effect of temperature on the circuit performance is also analyzed in this work. For 4-bit, the input required are a 0 to a 3 and b 0 to b 3 along with initial carry c in with the sum output signals as s 0 to s 3 and the carry outputs are c 0 to c 3 . The new high speed MCC requires inputs a 0 to a 7 , b 0 to b 7 , c in , clock and the corresponding outputs are c 0 to c 7 and are implemented by using HSPICE." @default.
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- W2610236413 date "2017-01-01" @default.
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- W2610236413 title "Performance Comparison of 64-bit Carry Look-Ahead Adders Using 32nm CMOS Technology" @default.
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- W2610236413 doi "https://doi.org/10.1016/j.matpr.2017.02.118" @default.
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