FRINK Linked Data Fragments server

Matches in SemOpenAlex for { <https://semopenalex.org/work/W2616157094> ?p ?o ?g. }

• W2616157094 abstract "Reconfigurable computing combines traditional processors together with FPGAs, creating heterogeneous architectures ripe for massively improving application performance. Yet, hardware development for FPGAs is notoriously difficult and far-removed from software design, leaving this potential unrealised. This thesis explores two major techniques to address this gap. The first technique is the seamless integration of dedicated hardware data structures within existing software applications, an area which has received very little attention. Implementing data structures in hardware and exposing them at run-time, can boost the performance of applications. A case study explored the use of a hardware priority queue in graph algorithms. This implementation attained much better performance characteristics compared to software-only counterparts. Seamless communication between accelerator and the host CPU has been achieved by developing an application abstraction layer with runtime support to choose underlying implementations. This approach increases ease of use given the minimal modifications required to the original application. Moreover, hardware/software co-design is employed to create a hybrid priority queue. This provides tangible benefits, serving as the driver for new features that would be difficult to implement with hardware alone. Complete application experiments showed a moderate overall performance speedup but, more importantly, demonstrated the promise of the concept. The second technique, the major focus of this thesis, is polyhedralassisted accelerator generation for loop kernels. Nested loop kernels consisting of numeric operations is a primary, but non-trivial, target for FPGA acceleration. High-level application synthesis addresses the design challenge by attempting to generate accelerators based on the existing software implementation of the kernel. This thesis extends this concept, using the polyhedral model for the analysis and transformation of the input codes based on a user-specified scattering function. An experimental tool-chain, named polyAcc, was developed which provides a semi-automated implementation of the proposed methodology. The foundation of this approach is the development of an innovative architectural framework that is amenable to the mapping of accelerator codes. One of the novel proposals is a technique for the exploitation of embedded memories on the FPGA to leverage high bandwidth for computation. Polyhedral compilation techniques, driven from the behaviour expressed by input scattering functions, form the basis for scheduling and building the accelerator. The thesis investigates methods to generate the datapath, interconnection network, and the accelerator control program from the target polyhedron schedule. Furthermore, scalability and performance are enhanced by applying pipelining and tiling techniques to the designs. Extensive experimental testing has shown success with different common scientific input kernels. Performance scaled admirably with resource consumption and proved…" @default.
• W2616157094 created "2017-05-26" @default.
• W2616157094 creator A5019019393 @default.
• W2616157094 date "2013-01-01" @default.
• W2616157094 modified "2023-09-24" @default.
• W2616157094 title "Novel Approaches to Automatic Hardware Acceleration of High-Level Software" @default.
• W2616157094 hasPublicationYear "2013" @default.
• W2616157094 type Work @default.
• W2616157094 sameAs 2616157094 @default.
• W2616157094 citedByCount "0" @default.
• W2616157094 crossrefType "dissertation" @default.
• W2616157094 hasAuthorship W2616157094A5019019393 @default.
• W2616157094 hasConcept C111919701 @default.
• W2616157094 hasConcept C115903868 @default.
• W2616157094 hasConcept C118524514 @default.
• W2616157094 hasConcept C13164978 @default.
• W2616157094 hasConcept C142962650 @default.
• W2616157094 hasConcept C149635348 @default.
• W2616157094 hasConcept C160403385 @default.
• W2616157094 hasConcept C174683762 @default.
• W2616157094 hasConcept C199360897 @default.
• W2616157094 hasConcept C26713055 @default.
• W2616157094 hasConcept C2777904410 @default.
• W2616157094 hasConcept C41008148 @default.
• W2616157094 hasConcept C42935608 @default.
• W2616157094 hasConcept C529173508 @default.
• W2616157094 hasConcept C68339613 @default.
• W2616157094 hasConcept C76518257 @default.
• W2616157094 hasConcept C9390403 @default.
• W2616157094 hasConceptScore W2616157094C111919701 @default.
• W2616157094 hasConceptScore W2616157094C115903868 @default.
• W2616157094 hasConceptScore W2616157094C118524514 @default.
• W2616157094 hasConceptScore W2616157094C13164978 @default.
• W2616157094 hasConceptScore W2616157094C142962650 @default.
• W2616157094 hasConceptScore W2616157094C149635348 @default.
• W2616157094 hasConceptScore W2616157094C160403385 @default.
• W2616157094 hasConceptScore W2616157094C174683762 @default.
• W2616157094 hasConceptScore W2616157094C199360897 @default.
• W2616157094 hasConceptScore W2616157094C26713055 @default.
• W2616157094 hasConceptScore W2616157094C2777904410 @default.
• W2616157094 hasConceptScore W2616157094C41008148 @default.
• W2616157094 hasConceptScore W2616157094C42935608 @default.
• W2616157094 hasConceptScore W2616157094C529173508 @default.
• W2616157094 hasConceptScore W2616157094C68339613 @default.
• W2616157094 hasConceptScore W2616157094C76518257 @default.
• W2616157094 hasConceptScore W2616157094C9390403 @default.
• W2616157094 hasLocation W26161570941 @default.
• W2616157094 hasOpenAccess W2616157094 @default.
• W2616157094 hasPrimaryLocation W26161570941 @default.
• W2616157094 hasRelatedWork W12617023 @default.
• W2616157094 hasRelatedWork W1532993377 @default.
• W2616157094 hasRelatedWork W1539568331 @default.
• W2616157094 hasRelatedWork W1994337600 @default.
• W2616157094 hasRelatedWork W2110628192 @default.
• W2616157094 hasRelatedWork W2119342121 @default.
• W2616157094 hasRelatedWork W2130958826 @default.
• W2616157094 hasRelatedWork W2181700130 @default.
• W2616157094 hasRelatedWork W2233740382 @default.
• W2616157094 hasRelatedWork W236129104 @default.
• W2616157094 hasRelatedWork W2475547859 @default.
• W2616157094 hasRelatedWork W2516974894 @default.
• W2616157094 hasRelatedWork W2809168092 @default.
• W2616157094 hasRelatedWork W2967111204 @default.
• W2616157094 hasRelatedWork W3006559397 @default.
• W2616157094 hasRelatedWork W3015271291 @default.
• W2616157094 hasRelatedWork W564081605 @default.
• W2616157094 hasRelatedWork W68584736 @default.
• W2616157094 hasRelatedWork W873697874 @default.
• W2616157094 hasRelatedWork W2587569722 @default.
• W2616157094 isParatext "false" @default.
• W2616157094 isRetracted "false" @default.
• W2616157094 magId "2616157094" @default.
• W2616157094 workType "dissertation" @default.