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- W2621148739 abstract "This work presents a low power dual-mode electrocardiogram (ECG) processor with QRS detection and ECG signal lossless compression. An adaptive difference-insensitive filter is proposed to eliminate redundant information in signal for QRS detection, which helps minimize calculation power. It is also adopted as a noise estimator and used to improve the noise tolerance of the detector. Furthermore, in compression mode, linear predictor with a novel adaptive length encoder is applied to the ECG data lossless compression, achieving a compression ratio (CR) of 2.42 with 1.06 K gate count. Implemented in 40 nm CMOS technology, the processor has a total core area of 6806 µm2, with 36 nW power consumption in detection mode and 7.3 nW in compression mode under a supply voltage of 0.5 V." @default.
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- W2621148739 date "2017-01-01" @default.
- W2621148739 modified "2023-10-05" @default.
- W2621148739 title "A dual-mode ECG processor with difference-insensitive QRS detection and lossless compression" @default.
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- W2621148739 doi "https://doi.org/10.1587/elex.14.20170524" @default.
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