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- W2625004888 abstract "Many embedded computers are distributed systems, composed of several heterogeneous processors and communication links of varying speeds and topologies. This paper describes a new, heuristic algorithm which simultaneously synthesizes the hardware and software architectures of a distributed system to meet a performance goal and minimize cost The hardware architecture of the synthesized system consists of a network of processors of multiple types and arbitrary communication topology; the software architecture consists of an allocation of processes to processors and a schedule for the processes. Most previous work in co-synthesis targets an architectural template, whereas this algorithm can synthesize a distributed system of arbitrary topology. The algorithm works from a technology database which describes the available processors, communication links, I/O devices, and implementations of processes on processors. Previous work had proposed solving this problem by integer linear programming (ILP); our algorithm is much faster than ILP and produces high-quality results." @default.
- W2625004888 created "2017-06-23" @default.
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- W2625004888 date "2002-01-01" @default.
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- W2625004888 title "An Architectural Co-Synthesis Algorithm for Distributed, Embedded Computing Systems. Manuscript received December 21, 1994; revised October 6, 1995. This work was supported in part by the National Science Foundation under Grant MIP-9121901. Equipment support for this work was provided by the National Science Foundation under Grant CDA-9216171. Publisher Item Identifier S 1063-8210(97)01954-9" @default.
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- W2625004888 doi "https://doi.org/10.1016/b978-155860702-6/50030-2" @default.
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