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- W2654403014 abstract "SRAM (Static Random Access Memory) is an significant component in memory devices where refresh operation required. To achieve high speed, SRAM has been used in most of the SOC chips. To get high reliability and low power consumptions in various applications a low power Static RAM is needed. This paper concentrates on reducing the dissipation of power during write operation in CMOS Static RAM cell for various frequencies. Here different cell SRAM cell structures like single bit SRAM, Stable SRAM cellrespectively implemented and those are compared with the proposed SRAM Cell construction. Generally, power indulgence happens through the write operation because of charging and dis-charging of the SRAM Cell bit line, it is the major problem in the Static RAM cell. In this work, the Static RAM cell proposed which operates at low power compared to existing models. The comparative analysis performed in the DSCH and Microwind tools by applying technology node as 180nm" @default.
- W2654403014 created "2017-06-30" @default.
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- W2654403014 date "2017-01-01" @default.
- W2654403014 modified "2023-09-23" @default.
- W2654403014 title "Implementation of low power sram cell Structure at deep submicron technologies" @default.
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- W2654403014 hasPublicationYear "2017" @default.
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