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- W2697402822 abstract "This paper proposes a hybrid sorted table design for minimizing electronic trading latency, with three main contributions. First, a hierarchical sorted table with two levels, a fast cache table in reconfigurable hardware storing megabytes of data items and a master table in software storing gigabytes of data items. Second, a full set of operations, including insertion, deletion, selection and sorting, for the hybrid table with latency in a few cycles. Third, an on-demand synchronization scheme between the cache table and the master table. An implementation has been developed that targets an FPGA-based network card in the environment of the China Financial Futures Exchange (CFFEX) which sustains 1-10Gb/s bandwidth with latency of 400 to 700 nanoseconds, providing an 80- to 125-fold latency reduction compared to a fully optimized CPU-based solution, and a 2.2-fold reduction over an existing FPGA-based solution." @default.
- W2697402822 created "2017-06-30" @default.
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- W2697402822 date "2017-04-01" @default.
- W2697402822 modified "2023-09-24" @default.
- W2697402822 title "A Nanosecond–Level Hybrid Table Design for Financial Market Data Generators" @default.
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- W2697402822 doi "https://doi.org/10.1109/fccm.2017.30" @default.
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