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- W2741299055 abstract "With increasing speed requirement for high-performance digital systems, digital cells have become more and more in nature. These analog behaviors determine the overall performance of a digital cell, like rise time, fall time and delay time. To address these analog concerns, we use a set of existing cell-level analog synthesis tools, ASTRX/OBLX, and apply it on digital cell synthesis. In this research we focus on the synthesis of single input, single output case of a buffer cell for a better understanding of the synthesis approach. Multiple input case can be solved base upon this approach. We use a piecewise linear drive curve table to efficiently estimate the transient behavior for a digital cell switching. A drive curve table can estimate a transient response within +/-3% of simulated response from HSPICE. Results show that this method can optimize a digital cell to perform with specified rise, fall, delay time but with minimum area and dynamic power consumption. Moreover, the switching edge slopes can be controlled by the user to minimize switching current, which usually contributes to inductive noise spike at the power supply lines. Synthesis of High-Performance Digital Cells in ASTRX/OBLX" @default.
- W2741299055 created "2017-08-08" @default.
- W2741299055 creator A5039386576 @default.
- W2741299055 date "1994-01-01" @default.
- W2741299055 modified "2023-09-26" @default.
- W2741299055 title "Synthesis of High-Performance Digital Cells in ASTRX/OBLX" @default.
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