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- W2743253991 abstract "The first ASIC-based Gauss error function (GEF) module is proposed and fabricated in SMIC 180-nm process in this paper. A novel method is proposed to be used in the design. Experimental results show that compared with the design based on Taylor expansion method, the proposed design decreases the absolute error by 99.21%, reduces the area by 77.21% and reduces the delay by 11.96%. It can be used as a Soft Intellectual Property (IP) Core or Digital Signal Processor (DSP) to be easily applied to all kinds of Neural Network applications. The design proposed and the corresponding design and optimization methods can promote the research and development of the implantable neural prosthesis bio-chip and neural network." @default.
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- W2743253991 date "2016-10-01" @default.
- W2743253991 modified "2023-09-27" @default.
- W2743253991 title "ASIC-based Gauss error function module design for Neural Network application" @default.
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- W2743253991 doi "https://doi.org/10.1109/icsict.2016.7998716" @default.
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