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• W2756978646 abstract "Low-density parity-check (LDPC) codes are known for superior performance over a wide range of codes for communication and memory systems. In many practical scenarios, adaptive ECC system is preferred that can adapt to various codes with varying channel conditions since the behavior of errors changes with time and space. This paper presents two architectural designs for efficient encoding of LDPC codes to support different code rates and lengths, which can be used for several applications. The proposed designs allow switching among different codes without any hardware modification. The first proposed design achieves extremely high throughput by removing the memory from the encoder, while still being able to adapt to a few predefined codes. The other architecture can adapt to any arbitrary code by using the memory for configuration, and yet, it achieves up to 12.9x throughput and 17.5x area improvement as compared to fully-reconfigurable encoders proposed in literature." @default.
• W2756978646 created "2017-10-06" @default.
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• W2756978646 date "2017-05-01" @default.
• W2756978646 modified "2023-09-23" @default.
• W2756978646 title "Rate-compatible and high-throughput architecture designs for encoding LDPC codes" @default.
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• W2756978646 doi "https://doi.org/10.1109/iscas.2017.8050836" @default.
• W2756978646 hasPublicationYear "2017" @default.
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