FRINK Linked Data Fragments server

Matches in SemOpenAlex for { <https://semopenalex.org/work/W2757297807> ?p ?o ?g. }

• W2757297807 endingPage "25" @default.
• W2757297807 startingPage "1" @default.
• W2757297807 abstract "With semiconductor technology scaling to the 22nm node and beyond, fin field-effect transistor (FinFET) has started replacing complementary metal-oxide semiconductor (CMOS), thanks to its superior control of short-channel effects and much lower leakage current. However, process, supply voltage, and temperature (PVT) variations across the integrated circuit (IC) become worse with technology scaling. Thus, to analyze timing, leakage power, and dynamic power under PVT variations, statistical analysis/optimization techniques are more suitable than traditional static timing/power analysis and optimization counterparts. In this article, we propose a statistical optimization framework using dual device-type assignment at the architecture level under PVT variations that takes spatial correlations into account and leverages circuit-level statistical analysis techniques. To the best of our knowledge, this is the first work to study statistical optimization at the system level under PVT variations. Simulation results show that leakage power yield and dynamic power yield at the mean value of the baseline can be improved by up to 44.2% and 21.2%, respectively, with no loss in timing yield for a single-core processor and up to 43.0% and 50.0%, respectively, without any loss in timing yield for an 8-core chip multiprocessor (CMP), at little area overhead. Under the same (99.0%) power yield constraints, leakage power and dynamic power are reduced by up to 91.2% and 4.3%, respectively, for a single-core processor, and up to 44.6% and 12.5%, respectively, for an 8-core CMP, with no loss in timing yield. We also show that optimizations performed without taking module-to-module and core-to-core spatial correlations into account overestimate yield, establishing the importance of taking such correlations into account." @default.
• W2757297807 created "2017-10-06" @default.
• W2757297807 creator A5044339131 @default.
• W2757297807 creator A5086131079 @default.
• W2757297807 date "2017-09-21" @default.
• W2757297807 modified "2023-10-10" @default.
• W2757297807 title "Statistical Optimization of FinFET Processor Architectures under PVT Variations Using Dual Device-Type Assignment" @default.
• W2757297807 cites W1488207264 @default.
• W2757297807 cites W1505816907 @default.
• W2757297807 cites W1970755039 @default.
• W2757297807 cites W1977789482 @default.
• W2757297807 cites W2008338328 @default.
• W2757297807 cites W2009248028 @default.
• W2757297807 cites W2022740893 @default.
• W2757297807 cites W2026980799 @default.
• W2757297807 cites W2035130574 @default.
• W2757297807 cites W2035567625 @default.
• W2757297807 cites W2042566540 @default.
• W2757297807 cites W2052022045 @default.
• W2757297807 cites W2055591173 @default.
• W2757297807 cites W2056761961 @default.
• W2757297807 cites W2070862897 @default.
• W2757297807 cites W2073368686 @default.
• W2757297807 cites W2076652033 @default.
• W2757297807 cites W2091083333 @default.
• W2757297807 cites W2093855145 @default.
• W2757297807 cites W2106759508 @default.
• W2757297807 cites W2122440811 @default.
• W2757297807 cites W2135327658 @default.
• W2757297807 cites W2136328167 @default.
• W2757297807 cites W2147657366 @default.
• W2757297807 cites W2150073849 @default.
• W2757297807 cites W2150283124 @default.
• W2757297807 cites W2158750015 @default.
• W2757297807 cites W2160580687 @default.
• W2757297807 cites W2162935501 @default.
• W2757297807 cites W2284954312 @default.
• W2757297807 cites W2291817514 @default.
• W2757297807 cites W2337414031 @default.
• W2757297807 cites W2406413704 @default.
• W2757297807 cites W2461583743 @default.
• W2757297807 cites W2527180232 @default.
• W2757297807 cites W2536956513 @default.
• W2757297807 cites W4253995697 @default.
• W2757297807 cites W4254506919 @default.
• W2757297807 doi "https://doi.org/10.1145/3110714" @default.
• W2757297807 hasPublicationYear "2017" @default.
• W2757297807 type Work @default.
• W2757297807 sameAs 2757297807 @default.
• W2757297807 citedByCount "1" @default.
• W2757297807 countsByYear W27572978072019 @default.
• W2757297807 crossrefType "journal-article" @default.
• W2757297807 hasAuthorship W2757297807A5044339131 @default.
• W2757297807 hasAuthorship W2757297807A5086131079 @default.
• W2757297807 hasBestOaLocation W27572978071 @default.
• W2757297807 hasConcept C119599485 @default.
• W2757297807 hasConcept C121332964 @default.
• W2757297807 hasConcept C127413603 @default.
• W2757297807 hasConcept C139719470 @default.
• W2757297807 hasConcept C162324750 @default.
• W2757297807 hasConcept C163258240 @default.
• W2757297807 hasConcept C165005293 @default.
• W2757297807 hasConcept C165801399 @default.
• W2757297807 hasConcept C168292644 @default.
• W2757297807 hasConcept C172385210 @default.
• W2757297807 hasConcept C24326235 @default.
• W2757297807 hasConcept C2524010 @default.
• W2757297807 hasConcept C2777042071 @default.
• W2757297807 hasConcept C2984118289 @default.
• W2757297807 hasConcept C33923547 @default.
• W2757297807 hasConcept C41008148 @default.
• W2757297807 hasConcept C45872418 @default.
• W2757297807 hasConcept C46362747 @default.
• W2757297807 hasConcept C530198007 @default.
• W2757297807 hasConcept C62520636 @default.
• W2757297807 hasConcept C93389723 @default.
• W2757297807 hasConcept C93682380 @default.
• W2757297807 hasConcept C99844830 @default.
• W2757297807 hasConceptScore W2757297807C119599485 @default.
• W2757297807 hasConceptScore W2757297807C121332964 @default.
• W2757297807 hasConceptScore W2757297807C127413603 @default.
• W2757297807 hasConceptScore W2757297807C139719470 @default.
• W2757297807 hasConceptScore W2757297807C162324750 @default.
• W2757297807 hasConceptScore W2757297807C163258240 @default.
• W2757297807 hasConceptScore W2757297807C165005293 @default.
• W2757297807 hasConceptScore W2757297807C165801399 @default.
• W2757297807 hasConceptScore W2757297807C168292644 @default.
• W2757297807 hasConceptScore W2757297807C172385210 @default.
• W2757297807 hasConceptScore W2757297807C24326235 @default.
• W2757297807 hasConceptScore W2757297807C2524010 @default.
• W2757297807 hasConceptScore W2757297807C2777042071 @default.
• W2757297807 hasConceptScore W2757297807C2984118289 @default.
• W2757297807 hasConceptScore W2757297807C33923547 @default.
• W2757297807 hasConceptScore W2757297807C41008148 @default.
• W2757297807 hasConceptScore W2757297807C45872418 @default.
• W2757297807 hasConceptScore W2757297807C46362747 @default.
• W2757297807 hasConceptScore W2757297807C530198007 @default.
• W2757297807 hasConceptScore W2757297807C62520636 @default.

• next