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- W2762444592 abstract "This paper presents a fault-tolerant topology reconfiguration backtracking algorithm to tolerate faulty cores in 2D REmesh based (reconfigurable mesh based) Networks-on-Chip. This new algorithm can be dynamically reconfigured to support irregular topologies caused by faulty cores in a REmesh network without destroying the integrity of topologies. In addition, the proposed reconfigure method has a high-level fault-tolerance capability and therefore it is capable to tolerate more faulty components in more complicated faulty situations without additional hardware costs. The reliability performance and fault-tolerance capability of the reconfiguration backtracking algorithm in a 2D REmesh network are evaluated through appropriate simulations. The experimental results show that in different sizes of topologies (the max size is 7 × 8), when less than 10.7% faulty cores occur, more than 91.5% successful reconfiguration rate can be achieved. In addition, in the 7 × 8 REmesh, when the faulty core reaches 7, the successful reconfiguration rate has reached 61.49%, which enhanced 9.74% compared with the TRARE algorithm." @default.
- W2762444592 created "2017-10-20" @default.
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- W2762444592 date "2017-01-01" @default.
- W2762444592 modified "2023-09-27" @default.
- W2762444592 title "A Novel Topology Reconfiguration Backtracking Algorithm for 2D REmesh Networks-on-Chip" @default.
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- W2762444592 doi "https://doi.org/10.1007/978-981-10-6442-5_5" @default.
- W2762444592 hasPublicationYear "2017" @default.
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