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- W2765261652 abstract "This paper presents a comparative study of Field Programmable Gate Array (FPGA) implementation of standard multipliers using Verilog HDL. Multiplier is a good candidate for digital signal processing (DSP) applications such as finite impulse response (FIR) and discrete cosine transforms (DCT) and so on. Significant reduction in FPGA resources, delay, and power can be achieved using Reduced Wallace multipliers with Kogge-stone adder instead of standard parallel multipliers." @default.
- W2765261652 created "2017-11-10" @default.
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- W2765261652 date "2012-07-16" @default.
- W2765261652 modified "2023-09-25" @default.
- W2765261652 title "Design and Analysis of Various Standard Multipliers Using Low Power Very Large Scale Integration (VLSI)" @default.
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- W2765261652 doi "https://doi.org/10.20894/ijmsr.117.004.001.007" @default.
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