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- W2765993003 abstract "SHA-3 was an open competition initiated by NIST to design new generation of hash functions. This competition was a necessity to overcome the challenges imposed by multiple attacks on MDx family of hash functions including SHA-0 and SHA-1. For this competition, NIST announced a reference platform which did not cover Embedded and Mobile machines. This paper compares the performance of SHA-3 final round candidate algorithms on ARM Cortex-M4 processor (embedded processor) and presents the results. Cycles per Byte is used as performance metric. Cortex-M4 based Stellaris® LM4F232 Evaluation Board (EK-LM4F232) from Texas Instruments is used for performance evaluation." @default.
- W2765993003 created "2017-11-10" @default.
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- W2765993003 date "2018-01-01" @default.
- W2765993003 modified "2023-09-27" @default.
- W2765993003 title "Performance Evaluation of SHA-3 Final Round Candidate Algorithms on ARM Cortex–M4 Processor" @default.
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- W2765993003 doi "https://doi.org/10.4018/ijisp.2018010106" @default.
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