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• W2767773388 abstract "This paper discusses the development of an algorithm for the data analysis to monitor Two-Wire-Interface operation in order to improve the reliability of communication. This algorithm is designed to improve code-efficiency with regards to hardware modelling. An algorithm for the protocol used in the Standard-Mode, Fast-Mode, Fast-Mode Plus and High-Speed-Mode was developed. The proposed algorithm has been derived using the bus protocol specification and implemented in hardware via a hardware description language. The correct operation of the algorithm was proofed by applying the hardware system on a sample communication. The paper also describes the development process of embedded systems and provides information on aspects regarding hardware modelling including a mathematical description of the TWI protocol is provided." @default.
• W2767773388 created "2017-11-17" @default.
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• W2767773388 date "2017-09-01" @default.
• W2767773388 modified "2023-09-24" @default.
• W2767773388 title "Algorithmic analysis and hardware implementation of a two-wire-interface communication analyser" @default.
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• W2767773388 doi "https://doi.org/10.1109/itecha.2017.8101936" @default.
• W2767773388 hasPublicationYear "2017" @default.
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