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• W2769095623 abstract "Radiation robust circuit design for harsh environments like space is a big challenge for today engineers and researchers. As circuits become more and more complex and CMOS processes get denser and smaller, their immunity towards particle strikes decreases drastically. This work proposes a novel SEU tolerant circuit design based on asynchronous communication coupled with magnetic memory and Silicon on Insulator (SOI) process that can detect and correct single or multiple errors without the triplication of the circuit. The combination of these techniques should give fundamentally higher performance than what is available today in terms of robustness but also in terms of surface area, reliability, speed and power consumption." @default.
• W2769095623 created "2017-12-04" @default.
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• W2769095623 date "2016-09-01" @default.
• W2769095623 modified "2023-09-25" @default.
• W2769095623 title "An SEU tolerant MRAM based non-volatile asynchronous circuit design" @default.
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• W2769095623 doi "https://doi.org/10.1109/radecs.2016.8093151" @default.
• W2769095623 hasPublicationYear "2016" @default.
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