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- W2773980292 abstract "Large number addition is the fundamental operation in cryptography algorithms. In this paper, we accelerate large addition in hardware design by introducing non-least-positive form, which is beneficial to parallel processing. An implementation of 256-bit signed array accumulator with our method shows an improvement of 18% in speed and 15% in area-delay product compared with traditional design." @default.
- W2773980292 created "2017-12-22" @default.
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- W2773980292 date "2017-10-01" @default.
- W2773980292 modified "2023-09-23" @default.
- W2773980292 title "A trick for parallel accumulation of signed array" @default.
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- W2773980292 doi "https://doi.org/10.1109/edssc.2017.8126440" @default.
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