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• W2781461638 abstract "This paper presents a broadband frequency doubler chip working in the WR-03 band (220–325 GHz). The chip is implemented in a 130-nm SiGe BiCMOS technology with an of 250/300 GHz. It consists of an integrated high-gain wideband amplifier to drive the frequency doubler. The doubler is based on a cascode push-push topology. Conversion loss of the doubler is reduced by utilizing an inductive feedback in the common-base stage. A very wideband operation of the doubler is achieved using optimally sized transistors and 4-reactance based input matching network. On-wafer measurement of the chip shows a state-of-the-art 17.4 dB peak conversion gain at 270 GHz. It delivers a maximum output power of almost 1 mW with a 3-dB bandwidth ranging from 257 GHz to 307 GHz, which is the highest bandwidth for Si-based frequency doublers working entirely in the WR-03 band. The chip consumes around 429 mW from a supply voltage of 3.3 V." @default.
• W2781461638 created "2018-01-05" @default.
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• W2781461638 date "2017-10-01" @default.
• W2781461638 modified "2023-09-23" @default.
• W2781461638 title "A 0.3-THz SiGe-based frequency doubler chip with 3-dB 50 GHz bandwidth and 17 dB peak conversion gain" @default.
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• W2781461638 doi "https://doi.org/10.23919/eumic.2017.8230678" @default.
• W2781461638 hasPublicationYear "2017" @default.
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