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- W2783419816 abstract "Many VLSI application system operate I/O supplies and core supplies and follow a predefined power up sequence. In this paper, a technique is presented to design low cost low power on reset circuit targeting low power applications. For designs operating on two supply (IOs etc.), most of the application requires power supply sequence free implementation and in order to do so, they need a signal to shut off the consumption and provide a fixed logic. The proposed circuitry helps in achieving the goal with very small consumption and area (2200 pm2). This circuit consumes maximum 3.2 μΑ static current in any state. The current consumption of proposed circuit is very low as compared to bandgap based POR circuit and very faster than inverter based conventional POR circuit. The proposed circuit works accurately for both ramp up and ramp down of power supply with varied possible transition times ranging from 10us to 10ms. Due to very low static current consumption and very fast response we can use this circuit in ultra-low power applications like IoT, imaging, sensing, biomedical and space. The proposed strategy has been presented with an implementation in 28nm CMOS FD-SOI technology and verified." @default.
- W2783419816 created "2018-01-26" @default.
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- W2783419816 date "2016-12-01" @default.
- W2783419816 modified "2023-10-01" @default.
- W2783419816 title "Low cost low power POR circuit for low voltage sensing using adaptive bulk biasing" @default.
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- W2783419816 doi "https://doi.org/10.1109/iciinfs.2016.8263066" @default.
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