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- W2787331302 abstract "Steep-slope MoS <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sub> NC-FETs with ferroelectric HZO and internal metal gate in the gate dielectric stack are demonstrated. SS less than 50 mV/dec is obtained for both forward and reverse gate voltage sweeps, with minimum SS <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>for</sub> = 37.6 mV/dec and minimum SS <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>Rev</sub> = 42.2 mV/dec. A second minimum of SSr <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>ev</sub> as low as 8.3 mV/dec can be measured as the result of dynamic switching at high speed in ferroelectric HZO. The impact of parasitic capacitance on SS and dynamic hysteresis is systematically studied by both experiment and dynamic simulation." @default.
- W2787331302 created "2018-02-23" @default.
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- W2787331302 date "2017-12-01" @default.
- W2787331302 modified "2023-10-13" @default.
- W2787331302 title "Sub-60 mV/dec ferroelectric HZO MoS<inf>2</inf> negative capacitance field-effect transistor with internal metal gate: The role of parasitic capacitance" @default.
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- W2787331302 doi "https://doi.org/10.1109/iedm.2017.8268447" @default.
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