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• W2787981181 abstract "A mixed analog-digital fuzzy logic inference engine chip fabricated in an 0.8 /spl mu/m CMOS process is described. Interface to the processor behaves like a static RAM, and computation of the fuzzy logic inference is performed between memory locations in parallel by an array of analog charge-domain circuits. Eight inputs and four outputs are provided, and up to 32 rules may be programmed into the chip. The results of the inference over all rules, including a center-of-mass defuzzification, may be computed in 2 /spl mu/s. >" @default.
• W2787981181 created "2018-03-06" @default.
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• W2787981181 date "1994-04-01" @default.
• W2787981181 modified "2023-09-26" @default.
• W2787981181 title "A fuzzy logic inference processor" @default.
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• W2787981181 doi "https://doi.org/10.1109/4.280687" @default.
• W2787981181 hasPublicationYear "1994" @default.
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