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- W2787990042 abstract "This work describes the implementation of a DCT (Discrete Cosine Transform) chip targeted to low power video (MPEG2 MP@ML) and still image (JPEG) applications. The chip exhibits two innovative techniques for arithmetic operation reduction in the DCT computation context (MSB rejection and row-column classification) along with standard voltage scaling techniques such as pipelining and parallelism." @default.
- W2787990042 created "2018-03-06" @default.
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- W2787990042 date "2003-01-20" @default.
- W2787990042 modified "2023-09-26" @default.
- W2787990042 title "A low-power DCT core using adaptive bitwidth and arithmetic activity exploiting signal correlations and quantization" @default.
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- W2787990042 doi "https://doi.org/10.1109/vlsic.1999.797217" @default.
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