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- W2789939892 abstract "This paper proposes two enhanced architectures for spin-orbit torque nonvolatile flip-flop (SOT-NVFF), namely, parallel programming scheme (pSOT-NVFF) and series programming scheme (sSOT-NVFF). At given SOT magnetic tunnel junction (SOT-MTJ) technology, the pSOT-NVFF achieves 29% lower backup energy with nearly 50% shorter backup delay compared with previous parallel architectures and the sSOT-NVFF offers at least 42% lower backup energy with 52% higher speed compared with others. Further analysis of the two proposed architectures showed a preferred window of operation for each architecture as a function of heavy metal electrode resistance (R <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>HM</sub> ). In particular, sSOT-NVFF is preferred, from speed and energy perspectives, for SOT-MTJs with small R <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>HM</sub> (i.e., hundreds of Ω to tens of kQ), while pSOT-NVFF is preferred for SOT-MTJs with large R <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>HM</sub> in the range of hundreds of kQ. Further study indicates that our NVFF is robust, stable, and functional even with process variations." @default.
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- W2789939892 date "2018-04-01" @default.
- W2789939892 modified "2023-10-18" @default.
- W2789939892 title "Energy- and Area-Efficient Spin–Orbit Torque Nonvolatile Flip-Flop for Power Gating Architecture" @default.
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- W2789939892 doi "https://doi.org/10.1109/tvlsi.2017.2787664" @default.
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