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• W2790969680 abstract "A 50Gb/s-PAM4 Clock/Data Recovery (CDR) transceiver is designed in a 40nm-CMOS process. An on-chip Eye Opening Monitor (EOM) is introduced that enables adaptive reference level and timing sampling placement for non-uniform and distorted PAM4-inputs." @default.
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• W2790969680 date "2018-01-01" @default.
• W2790969680 modified "2023-09-27" @default.
• W2790969680 title "A 50Gb/s-PAM4 CDR with On-Chip Eye Opening Monitor for Reference-Level and Clock-Sampling Adaptation" @default.
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• W2790969680 doi "https://doi.org/10.1364/ofc.2018.tu2c.4" @default.
• W2790969680 hasPublicationYear "2018" @default.
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