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- W2797492043 abstract "This Letter presents an inverter-type time amplifier (TA)-based phase noise filter (TAPNF) with 8 dB phase noise suppression and −133 dBc/Hz phase noise sensitivity at 1 MHz offset. The phase noise improvement strategy, low noise TA design and power consumption reduction techniques are presented. The TAPNF is fabricated in a 65 nm CMOS process with 1.4 mm × 1.6 mm chip area and consumes 50 mW power. To authors’ best knowledge, the TAPNF achieves the best phase noise and figure-of-merit compared with state-of-the-arts with similar technologies and carrier frequencies." @default.
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- W2797492043 date "2018-05-01" @default.
- W2797492043 modified "2023-09-26" @default.
- W2797492043 title "10 GHz inverter‐type‐time‐amplifier based phase noise filter with −133 dBc/Hz phase noise sensitivity" @default.
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- W2797492043 doi "https://doi.org/10.1049/el.2018.0622" @default.
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