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- W2797723737 abstract "This paper presents the implementation of linear regression model for degradation prediction on Register Transfer Logic (RTL) using QuartusII. A stationary model had been identified in the degradation trend for the engine oil in a vehicle in time series method. As for RTL implementation, the degradation model is written in Verilog HDL and the data input are taken at a certain time. Clock divider had been designed to support the timing sequence of input data. At every five data, a regression analysis is adapted for slope variation determination and prediction calculation. Here, only the negative value are taken as the consideration for the prediction purposes for less number of logic gate. Least Square Method is adapted to get the best linear model based on the mean values of time series data. The coded algorithm has been implemented on FPGA for validation purposes. The result shows the prediction time to change the engine oil." @default.
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- W2797723737 date "2018-03-01" @default.
- W2797723737 modified "2023-09-25" @default.
- W2797723737 title "FPGA implementation of predictive degradation model for engine oil lifetime" @default.
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- W2797723737 doi "https://doi.org/10.1088/1757-899x/341/1/012024" @default.
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