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- W2807078478 abstract "We report the development of a low-temperature (600 °C) gate oxidation approach to minimize the density of interface traps (D IT ) at the SiC/SiO 2 interface, ultimately leading to a significantly higher channel mobility in SiC MOSFETs of 81 cm 2 ·V -1 ·s -1 , >11x higher than devices fabricated alongside but with a conventional 1150 °C gate oxide. We further report on the comparison made between the D IT and channel mobilities of MOS capacitors and n-MOSFETs fabricated using the low-and high-temperature gate oxidation." @default.
- W2807078478 created "2018-06-13" @default.
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- W2807078478 date "2018-06-01" @default.
- W2807078478 modified "2023-09-27" @default.
- W2807078478 title "High-Mobility SiC MOSFETs Using a Thin-SiO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub> Gate Stack" @default.
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- W2807078478 doi "https://doi.org/10.4028/www.scientific.net/msf.924.494" @default.
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