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- W2885164976 abstract "A 64-bit Carry Look-ahead Adder (CLA) with radix-four structure is implemented using CMOS and FinFET-based asynchrobatic logic. The performance of designed adder circuits is assessed by comparing their power, energy, and power-delay product with those using 45 nm static CMOS technology over a range of frequencies and supply voltages. The results obtained reveal power and energy savings of up to 82 and 97% for CMOS and FinFET asynchrobatic adders, respectively, as compared to static CMOS circuits. A maximum PDP improvement of 89.47% at 0.5 V supply voltage is obtained with FinFET technology." @default.
- W2885164976 created "2018-08-22" @default.
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- W2885164976 date "2018-07-31" @default.
- W2885164976 modified "2023-09-27" @default.
- W2885164976 title "Energy-Efficient 64-Bit Asynchrobatic Adder" @default.
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- W2885164976 doi "https://doi.org/10.1007/978-981-10-8234-4_40" @default.
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