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- W2891342672 abstract "Whereas data persistence in non-volatile memories (NVMs) enables instant data recovery (IDR) in the face of power/system failures, it also exposes NVMs to data confidentiality and integrity attacks. Counter mode encryption and Merkle Tree authentication are established measures to thwart data confidentiality and integrity attacks, respectively, in NVMs. However, these security mechanisms require high overhead atomic security meta-data updates on every write-back in order to support IDR in NVMs. This increases memory traffic and negatively impacts system performance and memory lifetime. Architecture for Secure Non-Volatile Memories (ARSENAL) is an IDR-preserving, low cost, high performance security solution that protects NVM systems against data confidentiality and integrity attacks. ARSENAL synergistically integrates (i) Smart Writes for Faster Transactions (SWIFT) , a novel technique to reduce the performance overhead of atomic security meta-data updates on every write-back, with (ii) Terminal BMT Updates (TBU) , a novel BMT-consistency-preserving technique, to facilitate IDR in the face of power/system failures. Our evaluations show that on average, ARSENAL improves system performance (measured in IPC) by 2.26 $times$ (4 $times$ ), reduces memory traffic overhead by 1.47 $times$ (1.88 $times$ ), and improves memory lifetime by 2 $times$ (3.5 $times$ ) in comparison to conventional IDR-preserving 64-bit (128-bit) encryption+authentication." @default.
- W2891342672 created "2018-09-27" @default.
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- W2891342672 date "2018-07-01" @default.
- W2891342672 modified "2023-09-27" @default.
- W2891342672 title "ARSENAL: Architecture for Secure Non-Volatile Memories" @default.
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- W2891342672 doi "https://doi.org/10.1109/lca.2018.2863281" @default.
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