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• W2893270603 abstract "This paper presents a simulation-based assessment of the design, characteristics, and feasibility of a lateral SiGe heterojunction bipolar transistor with a graded base on a silicon on insulator. A device was created with a focus on integration with the CMOS process, THz f <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>T</sub> /f <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>max</sub> , and low-power dissipation. These characteristics are achieved with an ultrathin base width of 22 nm, grading of the base, and modification of standard doping profiles. In TCAD simulations, the n-p-n device has a unity gain cutoff frequency (f <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>T</sub> ) of 1.2 THz and maximum oscillation frequency (f <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>max</sub> ) of 2 THz. The p-n-p of the same design has f <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>T</sub> of 900 GHz and f <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>max</sub> of 1.8 THz. Additional Monte Carlo plots that show electron velocity and carrier densities across the length of the device, and a discussion on ballistic effects in the proposed devices are presented. To demonstrate the feasibility of the device, a possible process flow for fabrication is also summarized." @default.
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• W2893270603 date "2018-11-01" @default.
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• W2893270603 title "Assessment of THz Performance for a Lateral SiGe HBT on SOI With a Laterally Graded Base" @default.
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• W2893270603 doi "https://doi.org/10.1109/ted.2018.2869551" @default.
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