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- W2894760885 abstract "Abstract This paper presents a single-event-upset tolerant latch design based on a redundant structure featuring four storage nodes (i.e. Quatro). The reference structure manifests single node upset issues when either of the two internal nodes is hit and observes a positive transient afterwards. Two OFF-state transistors are added to those two internal pull-up paths, suppressing positive transient. Simulation and experimental data demonstrate that the proposed design has smaller cross section and higher upset threshold than the reference design." @default.
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- W2894760885 date "2018-09-01" @default.
- W2894760885 modified "2023-09-27" @default.
- W2894760885 title "A single event upset tolerant latch design" @default.
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- W2894760885 doi "https://doi.org/10.1016/j.microrel.2018.07.019" @default.
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