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• W2894968500 endingPage "3051" @default.
• W2894968500 startingPage "3041" @default.
• W2894968500 abstract "Current advances in emerging memory technologies enable novel and unconventional computing architectures for high-performance and low-power electronic systems, capable of carrying out massively parallel operations at the edge. One emerging technology, ReRAM, also known to belong in the family of memristors (memory resistors), is gathering attention due to its attractive features for logic and in-memory computing and benefits which follow from its technological attributes, such as nanoscale dimensions, low-power operation, and multi-state programming. At the same time, the design with CMOS is quickly reaching its physical and functional limitations, and further research toward novel logic families, such as threshold logic gates (TLGs), is scoped. In this paper, we introduce a physical implementation of a memristor-based current-mode TLG (MCMTLG) circuit and validate its design and operation through multiple experimental setups. We demonstrate two-input, three-input, and four-input MCMTLG configurations and showcase their reconfiguration capability. This is achieved by varying memristive weights arbitrarily for shaping the classification decision boundary, thus showing a promise as an alternative hardware-friendly implementation of artificial neural networks. Through the employment of real memristor devices as the equivalent of synaptic weights in TLGs, we are realizing components that can be used toward an in silico classifier." @default.
• W2894968500 created "2018-10-12" @default.
• W2894968500 creator A5001556143 @default.
• W2894968500 creator A5017301291 @default.
• W2894968500 creator A5025252401 @default.
• W2894968500 creator A5069001751 @default.
• W2894968500 creator A5088089733 @default.
• W2894968500 date "2019-08-01" @default.
• W2894968500 modified "2023-10-05" @default.
• W2894968500 title "Practical Implementation of Memristor-Based Threshold Logic Gates" @default.
• W2894968500 cites W1486771952 @default.
• W2894968500 cites W1489476854 @default.
• W2894968500 cites W1536641772 @default.
• W2894968500 cites W1562537717 @default.
• W2894968500 cites W1598516385 @default.
• W2894968500 cites W1599853812 @default.
• W2894968500 cites W1662522325 @default.
• W2894968500 cites W1964881180 @default.
• W2894968500 cites W1969747706 @default.
• W2894968500 cites W1975229527 @default.
• W2894968500 cites W1995341919 @default.
• W2894968500 cites W2000002573 @default.
• W2894968500 cites W2001167178 @default.
• W2894968500 cites W2013435193 @default.
• W2894968500 cites W2018774711 @default.
• W2894968500 cites W2043274724 @default.
• W2894968500 cites W2053517716 @default.
• W2894968500 cites W2061461907 @default.
• W2894968500 cites W2064680883 @default.
• W2894968500 cites W2066670907 @default.
• W2894968500 cites W2078843962 @default.
• W2894968500 cites W2083328379 @default.
• W2894968500 cites W2092608522 @default.
• W2894968500 cites W2092633783 @default.
• W2894968500 cites W2130255742 @default.
• W2894968500 cites W2151687972 @default.
• W2894968500 cites W2155296713 @default.
• W2894968500 cites W2160481230 @default.
• W2894968500 cites W2165685738 @default.
• W2894968500 cites W2342387592 @default.
• W2894968500 cites W2345076121 @default.
• W2894968500 cites W2507326620 @default.
• W2894968500 cites W2512574110 @default.
• W2894968500 cites W2529692069 @default.
• W2894968500 cites W2533175001 @default.
• W2894968500 cites W2544667623 @default.
• W2894968500 cites W2546925628 @default.
• W2894968500 cites W2560249189 @default.
• W2894968500 cites W2560615381 @default.
• W2894968500 cites W2587437692 @default.
• W2894968500 cites W2595197904 @default.
• W2894968500 cites W2605663629 @default.
• W2894968500 cites W2609852068 @default.
• W2894968500 cites W2757326298 @default.
• W2894968500 cites W2766489088 @default.
• W2894968500 cites W2769604575 @default.
• W2894968500 cites W2771447466 @default.
• W2894968500 cites W2779961690 @default.
• W2894968500 cites W2781401138 @default.
• W2894968500 cites W2783539394 @default.
• W2894968500 cites W2796285209 @default.
• W2894968500 cites W2796708821 @default.
• W2894968500 cites W2803163155 @default.
• W2894968500 cites W2805362231 @default.
• W2894968500 cites W2885023808 @default.
• W2894968500 cites W2888961626 @default.
• W2894968500 cites W2890120122 @default.
• W2894968500 cites W2900178210 @default.
• W2894968500 cites W2903728255 @default.
• W2894968500 cites W2962677196 @default.
• W2894968500 cites W2963771263 @default.
• W2894968500 cites W2963778543 @default.
• W2894968500 cites W3150708839 @default.
• W2894968500 cites W4241904915 @default.
• W2894968500 doi "https://doi.org/10.1109/tcsi.2019.2902475" @default.
• W2894968500 hasPublicationYear "2019" @default.
• W2894968500 type Work @default.
• W2894968500 sameAs 2894968500 @default.
• W2894968500 citedByCount "29" @default.
• W2894968500 countsByYear W28949685002019 @default.
• W2894968500 countsByYear W28949685002020 @default.
• W2894968500 countsByYear W28949685002021 @default.
• W2894968500 countsByYear W28949685002022 @default.
• W2894968500 countsByYear W28949685002023 @default.
• W2894968500 crossrefType "journal-article" @default.
• W2894968500 hasAuthorship W2894968500A5001556143 @default.
• W2894968500 hasAuthorship W2894968500A5017301291 @default.
• W2894968500 hasAuthorship W2894968500A5025252401 @default.
• W2894968500 hasAuthorship W2894968500A5069001751 @default.
• W2894968500 hasAuthorship W2894968500A5088089733 @default.
• W2894968500 hasBestOaLocation W28949685002 @default.
• W2894968500 hasConcept C11413529 @default.
• W2894968500 hasConcept C118524514 @default.
• W2894968500 hasConcept C119599485 @default.
• W2894968500 hasConcept C119701452 @default.
• W2894968500 hasConcept C120314980 @default.
• W2894968500 hasConcept C123593499 @default.
• W2894968500 hasConcept C127413603 @default.

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